A Hot Adelaide Afternoon and a Pile of FPGAs
I was recruited to wire together the NeTV2 to the Raspberry Pi 5 PCI bus by some means. Tim donated a bunch of hardware to make it work. I picked them up from his place, while he sorted through the contents of his container. The ultimate aim is to get them going as part of fpgas.online.
The box contained a treasure trove: an NeTV2 boards from bunnie’s (Andrew Huang) video overlay project, and lots of Raspberry Pi’s. As I went down the rabbit hole I acquired some more hardware for myself, Captain DMA development boards, and various other Artix-7 based experiments (Acorn, LiteFury). These boards share a common trait – they’re designed to appear as network devices on a PCI Express bus, which makes them interesting for all sorts of applications from video processing to… let’s say “creative” system analysis and game hacking using auto-target features.
The challenge with inheriting random FPGA boards is getting new gateware onto them. The original programming cables might be lost, proprietary software might be Windows-only and in Chinese, and documentation can be scarce. This is where OpenOCD and a humble Raspberry Pi come to the rescue. As long as you figure out which pins are the JTAG, and can get a PR merged.
The Problem: DMA Cards and Their Programming Woes
Captain DMA cards (and similar Artix-7 based DMA devices) typically come with a CH347 USB JTAG interface. The vendor provides a GUI tool, but it’s entirely in Chinese and only runs on Windows. For those of us who prefer reproducible, scripted workflows on Linux – or want to program boards headless on a Raspberry Pi – this is less than ideal.
The workflow the GUI implements is actually straightforward:
- Connect to the CH347 JTAG interface
- Detect the FPGA/JTAG chain
- Load a BSCAN SPI bitstream for JTAG-to-SPI access
- Program the SPI flash with the target FPGA image
- Refresh the FPGA to load the new bitstream
The key insight is that we’re not programming the FPGA directly – we’re using JTAG to access the SPI flash chip that stores the bitstream. The BSCAN primitive acts as a bridge between JTAG and the SPI flash.
OpenOCD Scripts for Captain DMA
I’ve put together a set of scripts at https://github.com/whatnick/fpga-dma-scripts that replicate the Chinese GUI’s functionality using pure OpenOCD commands. The scripts support Linux/macOS and Windows, and handle:
- Automatic BSCAN bitstream download from quartiq’s prebuilt collection
- CH347 interface configuration installation
- Version checking for OpenOCD (needs 0.12.0+dev for CH347 support)
- Cross-platform flashing with proper error handling
Basic Usage
On Linux/macOS:
./flash.sh 75t /path/to/pcileech_75t484_x1.binOn Windows:
flash.cmd 75t C:\path\to\pcileech_75t484_x1.binThe scripts support three Artix-7 variants: 35T, 75T, and 100T. The underlying OpenOCD command is:
openocd -c "set BSCAN_FILE bscan_spi_xc7a75t.bit" \
-c "set FPGAIMAGE pcileech_75t484_x1.bin" \
-f flash.cfgThe flash.cfg orchestrates the JTAG chain detection, BSCAN loading, and SPI programming sequence.
Example Output
A successful flash looks like this:
Open On-Chip Debugger 0.12.0+dev-02377-gb9e401616 (2026-01-25-09:47)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
xc7_program
jtagspi_program
Info : CH347 USB To UART+JTAG from vendor wch.cn with serial number 0123456789 found. (Chip version=5.44, Firmware=0x45)
Info : clock speed 7500 kHz
Info : JTAG tap: xc7.tap tap/device found: 0x13632093 (mfg: 0x049 (Xilinx), part: 0x3632, ver: 0x1)
Info : [xc7.proxy] Examination succeed
Info : Found flash device 'win w25q64fv/jv' (ID 0x1740ef)
Info : sector 0 took 234 ms
Info : sector 1 took 250 ms
...
Info : sector 32 took 259 ms
Info : sector 33 took 256 msEach sector takes about 230-260ms to program. A full 75T bitstream covers around 34 sectors, so expect 8-10 seconds for the flash operation.
NeTV2: Bunnie’s Video Overlay Board
The NeTV2 (Network Television version 2) is bunnie’s open-source HDMI video overlay board. It uses the same Xilinx Artix-7 family (XC7A35T or XC7A100T depending on variant) and was designed for real-time HDMI signal processing. The board features:
- Artix-7 FPGA (35T or 100T variant)
- DDR3 SDRAM (K4B2G1646F)
- PCIe x4 interface
- RMII Ethernet
- HDMI input and output
- SD card slot
- SPI flash for bitstream storage
The original NeTV2 scripts from bunnie’s repo (https://github.com/bunnie/netv2mvp-scripts) were designed for Raspberry Pi 2/3 using the older sysfs GPIO interface. I’ve submitted a PR (https://github.com/AlphamaxMedia/netv2mvp-scripts/pull/1) that updates these for Raspberry Pi 4 and upstream OpenOCD.
Raspberry Pi 4 GPIO JTAG Configuration
The key changes for RPi4 compatibility involve the bcm2835gpio driver configuration:
# Boilerplate setup for Rpi on Alphamax configuration
adapter driver bcm2835gpio
transport select jtag
set _CHIPNAME xc7a35t
# Raspi4 uses a different peripheral base address
# RPi 2/3: 0x3F000000
# RPi 4: 0xFE000000
bcm2835gpio peripheral_base 0x3F000000
# Speed coefficients tuned for RPi 3B+
bcm2835gpio speed_coeffs 100000 5
# GPIO pin assignments for JTAG
adapter gpio tck 4
adapter gpio tms 17
adapter gpio tdi 27
adapter gpio tdo 22
adapter gpio srst 24
reset_config none
adapter speed 10000The GPIO pins map directly to the Raspberry Pi’s header:
| Signal | GPIO | Physical Pin |
|---|---|---|
| TCK | 4 | 7 |
| TMS | 17 | 11 |
| TDI | 27 | 13 |
| TDO | 22 | 15 |
| SRST | 24 | 18 |
SPI Flash Programming with Raspberry Pi
The cl-spifpga-rpi4.cfg config file handles the actual programming:
# Burn an FPGA image onto the SPI ROM
source [find interface/alphamax-rpi.cfg]
source [find cpld/xilinx-xc7.cfg]
source [find cpld/jtagspi.cfg]
init
jtagspi_init xc7.pld $BSCAN_FILE
jtagspi_program $FPGAIMAGE 0
virtex2 refresh xc7.pld
exitThe command to flash a NeTV2 from a Raspberry Pi:
/opt/openocd/src/openocd \
-c "set BSCAN_FILE /home/k8s/netv2mvp-scripts/bscan_spi_xc7a100t.bit" \
-c "set FPGAIMAGE /home/k8s/pcileech_netv2_top.bin" \
-f /home/k8s/netv2mvp-scripts/cl-spifpga-rpi4.cfgThe output shows the Macronix SPI flash being programmed:
Info : BCM2835 GPIO JTAG/SWD bitbang driver
Info : clock speed 10000 kHz
Info : JTAG tap: xc7.tap tap/device found: 0x13631093 (mfg: 0x049 (Xilinx), part: 0x3631, ver: 0x1)
Info : [xc7.proxy] Examination succeed
Info : Found flash device 'mac 25l6405' (ID 0x1720c2)
Info : sector 0 took 286 ms
Info : sector 1 took 282 ms
...Note the device ID difference: 0x13631093 for the 100T part versus 0x13632093 for the 75T. The flash chip is a Macronix MX25L6405 (ID 0x1720c2) versus the Winbond W25Q64FV (ID 0x1740ef) on the Captain DMA boards.
LiteX Builds for NeTV2
If you want to run something other than the original gateware, LiteX has excellent support for the NeTV2. The board definition lives at https://github.com/litex-hub/litex-boards/blob/master/litex_boards/targets/kosagi_netv2.py.
Building a Basic LiteX SoC
Install LiteX following the standard setup, then:
cd litex-boards/litex_boards/targets
# Build for XC7A35T variant with Ethernet
./kosagi_netv2.py --variant=a7-35 --with-ethernet --build
# Or for the 100T variant with PCIe
./kosagi_netv2.py --variant=a7-100 --with-pcie --buildThe target supports:
- DDR3 SDRAM: Using the K4B2G1646F module with LiteDRAM
- Ethernet: RMII PHY via LiteEth
- PCIe: x4 Gen2 via LitePCIe
- SD Card: Both SPI mode and native SDIO
- LED Chaser: For the obligatory blinky demo
Platform Definition Highlights
The platform file defines the IO constraints:
_io = [
# 50 MHz clock input
("clk50", 0, Pins("J19"), IOStandard("LVCMOS33")),
# User LEDs
("user_led", 0, Pins("M21"), IOStandard("LVCMOS33")),
("user_led", 1, Pins("N20"), IOStandard("LVCMOS33")),
# ...
# SPI Flash for bitstream storage
("spiflash", 0,
Subsignal("cs_n", Pins("T19")),
Subsignal("mosi", Pins("P22")),
Subsignal("miso", Pins("R22")),
Subsignal("wp", Pins("P21")),
Subsignal("hold", Pins("R21")),
IOStandard("LVCMOS33")
),
]The platform also defines the programmer configuration, which now supports both OpenOCD and OpenFPGALoader:
def create_programmer(self, programmer="openocd"):
if programmer == "openfpgaloader":
return OpenFPGALoader(cable="digilent_hs2")
elif programmer == "openocd":
bscan_spi = "bscan_spi_xc7a100t.bit" if "xc7a100t" in self.device else "bscan_spi_xc7a35t.bit"
return OpenOCD("openocd_netv2_rpi.cfg", bscan_spi)Provisioning for fpgas.online
The ultimate destination for these NeTV2 boards is fpgas.online – a community project that provides free remote access to FPGA development boards. The service currently has around 10 FPGA boards connected, each with a webcam pointed at the LEDs so you can see your bitstream running in real-time.
Each board is attached to a Raspberry Pi that handles:
- JTAG programming via the GPIO bitbang interface
- Webcam streaming for visual feedback
- Web-based terminal access for interactive development
- Queue management so multiple users can share the hardware
This is where the Raspberry Pi JTAG programming approach really shines – you can reflash gateware remotely without any physical access to the boards. Combined with LiteX’s rapid build cycle, it becomes practical to iterate on FPGA designs from anywhere in the world.
If you want to try FPGA development without buying hardware, head over to https://ps1.fpgas.online/fpgas/ and claim a board. There’s usually one free and ready to use.
Why This Matters
These techniques apply to any Artix-7 board with SPI flash storage:
- Reproducibility: Scripts in version control beat clicking through GUIs
- Automation: CI/CD pipelines can flash test firmware automatically
- Headless operation: A Raspberry Pi in a lab can program boards remotely
- Cross-platform: The same OpenOCD configs work on Linux, macOS, and Windows
- Tool preservation: When vendors disappear, open source tooling remains
- Remote labs: Services like fpgas.online can offer FPGA access to anyone
The BSCAN SPI approach is particularly elegant – it uses a small “helper” bitstream that turns the FPGA’s JTAG interface into a SPI master, allowing you to program the flash chip that normally stores the FPGA configuration. Once programmed, a power cycle or refresh command loads the new bitstream.
Resources
- fpgas.online Remote Lab: https://ps1.fpgas.online/fpgas/
- Captain DMA Scripts: https://github.com/whatnick/fpga-dma-scripts
- NeTV2 RPi4 Scripts: https://github.com/AlphamaxMedia/netv2mvp-scripts/pull/1
- LiteX NeTV2 Target: https://github.com/litex-hub/litex-boards/blob/master/litex_boards/targets/kosagi_netv2.py
- BSCAN SPI Bitstreams: https://github.com/quartiq/bscan_spi_bitstreams
- PCILeech FPGA Project: https://github.com/ufrisk/pcileech-fpga
- Video Walkthrough: https://youtu.be/CNQnafoOTCM
The next time you inherit a box of mystery FPGA boards, you’ll know what to do. OpenOCD and a Raspberry Pi can breathe new life into almost any Xilinx 7-series board – no proprietary tools, no Windows VM, no Chinese language skills required.
Feel free to ping me with other interesting DMA or video processing boards you’ve encountered. There’s always more gateware to explore.
